Intel has unveiled a major update to its semiconductor manufacturing roadmap at the VLSI Symposium 2026, announcing that its next-generation Intel 18A-P process node has officially entered risk production. The company also showcased several technology advancements designed to improve performance, power efficiency, and thermal characteristics, while offering a glimpse into long-term research projects that could define the future of chipmaking.
Risk production is an important stage in semiconductor development where early manufacturing runs are used to validate yields, reliability, and performance before a process enters full-scale commercial production. According to Intel, Intel 18A-P has reached this milestone on schedule, meeting the timeline it previously shared with customers and partners.
“Our updates and presentations at VLSI signal to Intel Foundry customers and partners that we are fully committed to leading-edge process innovation over the long term” – Naga Chandrasekaran, Executive Vice President and General Manager of Intel Foundry.
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Intel 18A-P aims to deliver higher performance with lower power consumption
As the first performance-focused enhancement of the Intel 18A family, Intel 18A-P combines transistor, interconnect, and design optimizations to improve both speed and efficiency. The company claims the node can deliver up to 9% higher performance at the same power level, or 18% lower power consumption at the same performance compared to Intel 18A. It also introduces Power Boost, a new low-resistance transistor option designed to increase drive current and enable higher operating frequencies.
Intel says several engineering improvements contribute to these gains, including:
- 20-40% lower thermal resistance for better heat dissipation.
- 10-30% lower via resistance through geometry and material optimizations.
- PMOS strain engineering to improve transistor mobility.
- New low-power and high-performance transistor options, along with a fifth logic Vt pair for greater design flexibility.
- Full design-rule compatibility with Intel 18A, allowing existing IP and design workflows to be reused with minimal changes.
The company also highlighted the advantages of its Gate-All-Around (GAA) transistor architecture and Backside Power Delivery (BSPD) technology. By shifting power delivery to the back of the wafer, BSPD reduces front-side congestion, resulting in an 11% smaller routed area and a 10x reduction in dynamic voltage droop, which can enable up to a 6% frequency boost or 15% lower dynamic power consumption. Intel also shared silicon data showing around 30% better frequency scaling at low voltages of roughly 0.5V, alongside lower IR drop and improved efficiency.
Intel previews future technologies beyond the 18A generation
Alongside updates to Intel 18A-P, the company also used the VLSI Symposium to showcase research projects that could extend semiconductor scaling well beyond today’s manufacturing technologies.
One of the highlights was Complementary FET (CFET) technology. Intel demonstrated monolithic CFET inverters featuring vertically stacked NMOS and PMOS transistors built at a 45nm gate pitch. Instead of placing transistors side by side, CFET stacks them vertically, providing a potential path to continue transistor scaling even after Gate-All-Around architectures approach their physical limits.
Intel also revealed progress in integrating Gallium Nitride (GaN) power devices with traditional silicon logic on 300mm wafers. The demonstration included an approximately 1,000-gate digital control block, combining efficient power management and computing logic on a single piece of silicon. The company believes this approach could simplify future chip designs while reducing overall system complexity.
Another area of focus was subtractive ruthenium (sRu) interconnects with air-gap integration. As copper connections become increasingly difficult to scale at smaller process nodes, Intel says ruthenium offers a promising alternative. The company reported up to a 35% reduction in capacitance and measurable frequency improvements compared to copper, potentially enabling faster signal transmission in future generations of processors.
While these technologies are still in the research stage, Intel’s announcements at VLSI 2026 highlight a dual strategy: advancing near-term manufacturing through Intel 18A-P while continuing to invest in technologies that could shape the next era of semiconductor innovation.
